| Event Name | ISTFA 2025 |
|---|---|
| Dates | November 18-19, 2025 |
| Venue | Pasadena Convention Center, Pasadena, CA | Booth 300 |
| Official site | ISTFA 2025 |
At ISTFA 2025, Hamamatsu is proud to showcase our latest innovations for failure analysis systems. Our cutting-edge technologies are designed to elevate your capabilities in semiconductor analysis, empowering you to uncover the root causes of failures with precision and efficiency. Join us at booth 300 to learn how our state-of-the-art equipment and solutions are shaping the future of failure analysis. Discover how Hamamatsu can help you achieve faster, more accurate, and more insightful results. Don't miss this opportunity to explore the next generation of failure analysis systems with Hamamatsu.
Mr. Yunki Jung, Samsung Electronics Co.Ltd, Hwaseong-si, Gyeonggi-do, Korea, Republic of (South)
Mr. Akihito Uchikado, Hamamatsu Photonics K.K., Hamamatsu, Shizuoka, Japan
In this paper, we compare the conventional OBIRCH analysis with the new analysis method Thermo Dynamic Imaging (TDI) to demonstrate the effectiveness of the new method.. We also introduce case studies and provide examples.
Mr. Yasushi Oka, Renesas Electronics Corporation, Kodaira, Tokyo, Japan
Mr. Nakaba Matsui, Hamamatsu Photonics K. K, Hamamatsu, Shizuoka, Japan
To improve the success rate of FA, it is important to refine electrical troubleshooting processes. However, EFI techniques face serious challenges with excessive power consumption. This current can disrupt EFI operations. For example, it could cause switching delays due to internal IR drops, leading to unexpected malfunctions in logic operations. Moreover, it may damage the device. To mitigate this issue, minimizing the amount of switching activity during tests is a widely adopted measure to reduce power consumption. However, when the switching activity is reduced, the total test time becomes longer, and so does the looping period for EFI. This weakens every EFI detection signal, causing the 2D location image to be less clear. To address this problem, a PEM with halting at failing logic state was studied, which will not cause excessive switching current. This static PEM method proved effective, offering more accurate localization than conventional dynamic EFI techniques.
Dr. Norimichi Chinone, Hamamatsu Corporation, San Jose, CA
Mr. Shota Nozue, Hamamatsu Photonics K.K., Hamamatsu, Shizuoka, Japan
Mr. Shimpei Tominaga, Hamamatsu Photonics K.K., Hamamatsu, Shizuoka, Japan
Mr. Yuhei Aoshima, Hamamatsu Photonics K.K., Hamamatsu, Shizuoka, Japan
Laser-scanning-based thermo-reflectance (TR) was applied to Si device to perform high spatial resolution thermal imaging. The resulting images were mixture of electro-optical and thermal signals, which were separated by means of investigating bias voltage dependency. TR was confirmed to be promising for high spatial resolution thermal imaging on Si devices.
Ms. Hyeongki Kim, Samsung Electronics, Hwaseong-si, Gyeonggi-do, Korea, Republic of (South)
Mr. Akihito Uchikado, Hamamatsu Photonics K.K., Hamamatsu, Shizuoka, Japan
Dr. Norimichi Norimichi, Hamamatsu Photonics K.K., Hamamatsu, Shizuoka, Japan
To increase yield and cost competitiveness, FLASH memory device developed vertical stack 3D-VNAND. Furthermore, we introduced Cell over Peripheral (COP), which places peripheral circuits, which were previously located at the same level as memory cells, under the memory cells, thereby reducing the chip size and increasing the number of Dies acquired per wafer. Due to such high stacking and high integration, it is becoming increasingly difficult to identify the location of failures in vertical structures. As one way to solve this problem, we investigated a depth-direction isolation method using lock-in OBIRCH (Optical Beam Induced Resistance Change). As a result, we obtained separate hot spot image results from overlapping memory cells and peripheral circuits. This paper describes these methods and their results.
Dr. Norimichi Chinone, Hamamatsu Corporation, San Jose, CA
A data processing algorithm that can break a SNR vs. spatial resolution trade-off in Lock-in OBIRCH was introduced. This algorithm eliminates overlapping among signals caused by significant heat diffusion in low lock-in frequency by deconvoluting heat diffusion. Lock-in OBIRCH data was collected on a test sample followed by data processing, which confirmed the benefit of this algorithm.
Mrs. Xiangguang Mao, Hamamatsu Photonics K.K, Hamamatsu, Shizuoka, Japan
Electro-optic (EO) probing is a widely used technique in failure analysis (FA). Conventional EO probing techniques use digitizers or oscilloscopes to accumulate data over extended periods to obtain waveforms, making the EO probing method a time-consuming technique for FA. This paper presents a novel approach to using a streak camera in conjunction with Automated Test Equipment (ATE). By adjusting the high reputation test loop over 1 MHz, one can capture the waveform in a short temporal acquisition window with extremely high time resolution.
The PHEMOS-X emission microscope C15765-01 is a completely redesigned version of the workhorse PHEMOS-1000. This microscope provides exceptional sensitivity and resolution, allowing you to capture emissions at the finest detail. The laser scanner, optical stage, probe station and macro lens have been redesigned for the advanced semiconductor challenges of the future. Explore the future of microscopy with the PHEMOS-X emission microscope C15765-01.
The iPHEMOS-MPX inverted emission microscope C10506-07-06 is your gateway to the world of cutting-edge inverted microscopy, offering unmatched versatility, precision, and imaging capabilities. Its exceptional sensitivity and high-resolution imaging enable you to capture emission signals with unprecedented clarity. Enabling multiple laser, camera and SIL options to be configured on a single system, the iPHEMOS-MPX is the combo system of the future.
The dual PHEMOS-X emission microscope C16506-01 is a revolutionary breakthrough in electrical failure analysis, featuring both a top side and bottom side microscope in a single system. This allows for wafer analysis from both the front and backside simultaneously to ensure that the fault can be located regardless of its position. Our hope is that this new capability will enable applications that were previously not possible with just a single microscope.
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